HP OpenVMS systems
The OpenVMS Alpha and OpenVMS I64 operating systems provide support for
64-bit virtual memory addressing. This capability makes the 64-bit
virtual address space, defined by the Alpha and Intel Itanium
architectures, available to the OpenVMS Alpha and OpenVMS I64 operating
systems and to application programs. For information about Very Large
Memory, see Chapter 16.
10.1 Using 64-Bit Addresses
Many OpenVMS Alpha and OpenVMS I64 tools and languages (including the Debugger, run-time library routines, and HP C) support 64-bit virtual addressing. Input and output operations can be performed directly to and from the 64-bit addressable space by means of RMS services, the $QIO system service, and most of the device drivers supplied with OpenVMS Alpha and OpenVMS I64 systems.
Underlying this are system services that allow an application to allocate and manage the 64-bit virtual address space, which is available for process-private use.
By using the OpenVMS Alpha and OpenVMS I64 tools and languages that support 64-bit addressing, programmers can create images that map and access data beyond the limits of 32-bit virtual addresses. The 64-bit virtual address space design ensures upward compatibility of programs, while providing a flexible framework that allows 64-bit addresses to be used in many different ways to solve new problems.
Nonprivileged programs can optionally be modified to take advantage of 64-bit addressing features. OpenVMS Alpha and OpenVMS I64 64-bit virtual addressing does not affect nonprivileged programs that are not explicitly modified to exploit 64-bit support. Binary and source compatibility of existing 32-bit nonprivileged programs is guaranteed.
By using 64-bit addressing capabilities, application programs can map large amounts of data into memory to provide high levels of performance and make use of very large memory (VLM) systems. In addition, 64-bit addressing allows for more efficient use of system resources, allowing for larger user processes, as well as higher numbers of users and client/server processes for virtually unlimited scalability.
This chapter describes the layout and components of the OpenVMS Alpha and OpenVMS I64 64-bit virtual memory address space.
For more information about the OpenVMS Alpha and OpenVMS I64
programming tools and languages that support 64-bit addressing and
recommendations for enhancing applications to support 64-bit addressing
and VLM, refer to the subsequent chapters in this guide.
10.2 Traditional OpenVMS 32-Bit Virtual Address Space Layout
In early versions of the OpenVMS Alpha operating system, the virtual address space layout was largely based upon the 32-bit virtual address space defined by the VAX architecture. Figure 10-1 illustrates the OpenVMS Alpha implementation of the OpenVMS VAX layout.
Figure 10-1 32-Bit Virtual Address Space Layout
The lower half of the OpenVMS VAX virtual address space (addresses between 0 and 7FFFFFFF16) is called process-private space. This space is further divided into two equal pieces called P0 space and P1 space. Each space is 1 GB long. The P0 space range is from 0 to 3FFFFFFF16. P0 space starts at location 0 and expands toward increasing addresses. The P1 space range is from 4000000016 to 7FFFFFFF16. P1 space starts at location 7FFFFFFF16 and expands toward decreasing addresses.
The upper half of the VAX virtual address space is called system space. The lower half of system space (the addresses between 8000000016 and BFFFFFFF16) is called S0 space. S0 space begins at 8000000016 and expands toward increasing addresses.
The VAX architecture associates a page table with each region of
virtual address space. The processor translates system space addresses
using the system page table. Each process has its own P0 and P1 page
tables. A VAX page table does not map the full virtual address space
possible; instead, it maps only the part of its region that has been
10.3 OpenVMS Alpha and OpenVMS I64 64-Bit Virtual Address Space Layout
The OpenVMS Alpha and OpenVMS I64 64-bit address space layout is an extension of the traditional OpenVMS 32-bit address space layout.
Figure 10-2 illustrates the 64-bit virtual address space layout design.
To reduce the complexity of the figure, Figure 10-2 oversimplifies the virtual address space layout. For OpenVMS Alpha, there is a gap in the middle of P2 space, as described in Section 10.3.4.
For OpenVMS I64, there is no gap in P2 space. However, as described in Section 10.3.4:
Only portions of Regions 0 and 7 are used in this release.
For both OpenVMS Alpha and OpenVMS I64, the OpenVMS memory management system services always return virtually contiguous address ranges.
Figure 10-2 64-Bit Virtual Address Space Layout
The 64-bit virtual address space layout is designed to accommodate the current and future needs of the OpenVMS Alpha and OpenVMS I64 operating systems and its users. The address space consists of the following fundamental areas:
Supporting process-private address space is a focus of much of the memory management design within the OpenVMS operating system.
Process-private space, or process space, contains all virtual addresses below PT space. As shown in Figure 10-2, the layout of process space is further divided into the P0, P1, and P2 spaces. P0 space refers to the program region. P1 space refers to the control region. P2 space refers to the 64-bit program region.
The P0 and P1 spaces are defined to equate to the P0 and P1 regions defined by the VAX architecture. Together, they encompass the traditional 32-bit process-private region that ranges from 0.0000000016 to 0.7FFFFFFF16. P2 space encompasses all remaining process space that begins just above P1 space, 0.8000000016, and ends just below the lowest address of PT space.
OpenVMS I64 P2 process space is larger than that of OpenVMS Alpha: 8-TB
(-2 GB for P0/P1) for OpenVMS I64, compared with 4-TB for OpenVMS Alpha.
10.3.2 System Space
64-bit system space refers to the portion of the entire 64-bit virtual address range that is higher than that which contains PT space. As shown in Figure 10-2, system space is further divided into the S0, S1, and S2 spaces.
The S0 and S1 spaces are defined to equate to the S0 and S1 regions defined by the VAX architecture. Together they encompass the traditional 32-bit system space region that ranges from FFFFFFFF.8000000016 to FFFFFFFF.FFFFFFFF16. S2 space encompasses all remaining system spaces between the highest address of PT space and the lowest address of the combined S0/S1 space.
OpenVMS I64 S2 process space is larger than that of OpenVMS Alpha: 8-TB (-2 GB for S0/S1) for OpenVMS I64, compared with 4-TB for OpenVMS Alpha.
S0, S1, and S2 are fully shared by all processes. S0/S1 space expands toward increasing virtual addresses. S2 space generally expands toward lower virtual addresses.
Addresses within system space can be created and deleted only from code that is executing in kernel mode. However, page protection for system space pages can be set up to allow any less privileged access mode read and write access.
System space base is controlled by the S2_SIZE system parameter. S2_SIZE is the number of megabytes to reserve for S2 space. The default value is based on the sizes required by expected consumers of 64-bit (S2) system space. Consumers set up by OpenVMS at boot time are the page frame number (PFN) database and the global page table. (For more information about setting system parameters with SYSGEN, see the HP OpenVMS System Management Utilities Reference Manual: M--Z.)
The global page table, also known as the
GPT, and the PFN database reside in the
lowest-addressed portion of S2 space. By implementing the GPT and PFN
database in S2 space, the size of these areas is not constrained to a
small portion of S0/S1 space. This allows OpenVMS to support large
physical memories and large global sections.
10.3.3 Page Table Space
Page tables are addressed primarily within 64-bit PT space. Page tables refer to this virtual address range; they are not in 32-bit shared system address space.
The dotted line in Figure 10-2 marks the boundary between process-private space and shared space. This boundary is in PT space and further serves as the boundary between the process-private page table entries and the shared page table entries. Together, these sets of entries map the entire address space available to a given process. PT space is mapped to the same virtual address for each process, typically a very high address such as FFFFFFFC.0000000016.
I64 has two page table spaces, one for process private in region 0 and
one for system space in region 7. If you use only supported interfaces
to manage page table entries, this distinction is not visible. However,
any code that attempts to compute the page table entry address "by
hand" for a given virtual address is not guaranteed to work.
10.3.4 Virtual Address Space Size
Both the Alpha and Intel Itanium architectures support 64-bit addresses.
The Alpha architecture requires that all implementations must use or check all 64 bits of a virtual address during the translation of a virtual address into a physical memory address. However, implementations of the Alpha architecture are allowed to materialize a subset of the virtual address space. Current Alpha hardware implementations support 43 significant bits within a 64-bit virtual address. This results in an 8-TB address space.
On current Alpha architecture implementations, bit 42 within a virtual address must be sign-extended or propagated through bit 63 (the least significant bit is numbered from 0). Virtual addresses where bits 42 through 63 are not all zeros or all ones result in an access violation when referenced. Therefore, the valid 8-TB address space is partitioned into two disjoint 4-TB ranges separated by a no access range in the middle.
The layout of the OpenVMS Alpha address space transparently places this no access range within P2 space. (The OpenVMS Alpha memory management system services always return virtually contiguous address ranges.) The result of the OpenVMS Alpha address space layout design is that valid addresses in P2 space can be positive or negative values when interpreted as signed 64-bit integers.
Current OpenVMS I64 implementations support 44 significant bits for up to 8-TB of process space and 8-TB of system space. However, bit 42 within a virtual address need not be sign-extended or propagated through bit 63, and there is no gap in the I64 P2 space.
The Intel Itanium 64bit virtual address space is divided into eight virtual regions that are identified by region IDs (RIDs). (These regions are distinct from, and not related to, the OpenVMS virtual regions described in Section 10.4.) The 8-TB process space is in Region 0 and includes P0/P1, P2, and the process page table space. The 8-TB system space is in region 7 and includes S0/S1, S2, and the system page table space.
The Intel Itanium virtual address regions are not currently exposed to OpenVMS system services.
Note that to preserve 32-bit nonprivileged code compatibility, bit 31
in a valid 32-bit virtual address can still be used to distinguish an
address in P0/P1 space from an address in S0/S1 space.
10.4 Virtual Regions
A virtual region is a reserved range of process-private virtual addresses. It may be either a user-defined virtual region reserved by the user program at run time or a process-permanent virtual region reserved by the system on behalf of the process during process creation.
Three process-permanent virtual regions are defined by OpenVMS at the time the process is created:
These three process-permanent virtual regions exist so that programmers do not have to create virtual regions if their application does not need to reserve additional ranges of address space.
Virtual regions promote modularity within applications by allowing different components of the application to manipulate data in different virtual regions. When a virtual region is created, the caller of the service is returned a region ID to identify that virtual region. The region ID is used when creating, manipulating, and deleting virtual addresses within that region. Different components within an application can create separate virtual regions so that their use of virtual memory does not conflict.
Virtual regions exhibit the following characteristics.
There is one process-permanent virtual region for all of P0 space that starts at virtual address 0 and ends at virtual address 0.3FFFFFFF16. This is called the program region. There is also one process-permanent region for all of P1 space that starts at virtual address 0.4000000016 and ends at virtual address 0.7FFFFFFF16. This is called the control region.
The program and control regions are considered to be owned by kernel mode and have a create mode of user, because user mode callers can create virtual address space within these virtual regions.
These program and control regions cannot be deleted. They are
considered to be process-permanent.
10.4.2 64-Bit Program Region
P2 space has a densely expandable virtual region starting at the lowest virtual address of P2 space, 0.8000000016. This region is called the 64-bit program region. Having a 64-bit program region in P2 space allows an application that does not need to take advantage of explicit virtual regions to avoid incurring the overhead of creating a virtual region in P2 space. This virtual region always exists, so addresses can be created within P2 space immediately.
As described in Section 10.4.3, a user can create a virtual region in otherwise unoccupied P2 space. If the user-defined virtual region is specified to start at the lowest address of the 64-bit program region, then any subsequent attempt to allocate virtual memory within the region will fail.
The region has a user create mode associated with it; that is, any access mode can create virtual address space within it.
The 64-bit program region cannot be deleted. It is considered to be
process-permanent and survives image rundown. Note that all created
address space within the 64-bit program region is deleted and the
region is reset to encompass all of P2 space as a result of image
10.4.3 User-Defined Virtual Regions
A user-defined virtual region is a virtual region created by calling the new OpenVMS SYS$CREATE_REGION_64 system service. The location at which a user-defined virtual region is created is generally unpredictable. In order to maximize the expansion room for the 64-bit program region, OpenVMS memory management allocates virtual regions starting at the highest available virtual address in P2 space that is lower than any existing user-defined virtual region.
For maximum control of the process-private address space, the application programmer can specify the starting virtual address when creating a virtual region. This is useful in situations when it is imperative that the user be able to specify exact virtual memory layout.
Virtual regions can be created so that allocation occurs with either increasing addresses or decreasing virtual addresses. This allows applications with stacklike structures to create virtual address space and expand naturally.
Virtual region creation gives OpenVMS subsystems and the application programmer the ability to reserve virtual address space for expansion. For example, an application can create a large virtual region and then create some virtual addresses within that virtual region. Later, when the application requires more virtual address space, it can expand within the virtual region and create more address space in a virtually contiguous manner to the previous addresses allocated within that virtual region.
Virtual regions can also be created within P0 and P1 space by specifying VA$M_P0_SPACE or VA$M_P1_SPACE in the flags argument to the SYS$CREATE_REGION_64 service.