Subject: Re: Why Do Registers Exist ??? Date: Tue, 9 Jun 1998 23:04:16 GMT From: eee@netcom.com (Mark Thorson) Organization: Netcom Newsgroups: comp.arch In article , Mark Thorson wrote: > >So, whats wrong with this picture? It seems like such >an obvious idea that people must be doing it already, or >there must be a killer argument against it. Has there >been any indication how Merced will handle register >naming? I've managed to answer my own question using the IBM patent server (http://patent.womplex.ibm.com). Intel must be planning to use a register alias table to address the reorder buffer, which is not associative. See the following patents: 5721855 5627985 5615385 5613132 5564056 5548776 5524262 5499352 5497493 5471633 5452426 5446912 You'll recognize one of the inventors, Andy Glew. Judging by the patent literature, he must be one of Intel's top guys. Here's what seems to be the core of the group, and how many patents they have: Andy Glew 55 Glenn Hinton 54 David Papworth 28 Michael Fetterman 25 Robert Colwell 23 If you do keyword searches on the IBM patent server using the above last names in the inventor field and Intel in the assignee field, I think you can get a pretty good idea what some of Merced's features might be. I've only skimmed a few abstracts and claims, but the claims I've seen have been very impressive. They're very broad in covering the mechanisms described under these patents. Intel's patent attorneys must be first rate.